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PD - 95467
AUTOMOTIVE MOSFET
Typical Applications

IRF3808SPbF IRF3808LPBF
D
Integrated Starter Alternator 42 Volts Automotive Electrical Systems Lead-Free Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
HEXFET(R) Power MOSFET VDSS = 75V RDS(on) = 0.007
S
Benefits

G
ID = 106A
Description
Absolute Maximum Ratings
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG
Designed specifically for Automotive applications, this Advanced Planar Stripe HEXFET (R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this HEXFET power MOSFET are a 175C junction operating temperature, low RJC, fast switching speed and improved repetitive avalanche rating. This combination makes the design an extremely efficient and reliable choice for use in higher power Automotive electronic systems and a wide variety of other applications.
Parameter
Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
D2Pak IRF3808S
TO-262 IRF3808L
Max.
106 75 550 200 1.3 20 430 82 See Fig.12a, 12b, 15, 16 5.5 -55 to + 175 300 (1.6mm from case )
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient (PCB Mounted, Steady State)**
Typ.
--- ---
Max.
0.75 40
Units
C/W
HEXFET(R) is a registered trademark of International Rectifier.
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1
6/30/04
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IRF3808S/LPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff.
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. 75 --- --- 2.0 100 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.086 5.9 --- --- --- --- --- --- 150 31 50 16 140 68 120 4.5 7.5 5310 890 130 6010 570 1140
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 7.0 m VGS = 10V, ID = 82A 4.0 V VDS = 10V, ID = 250A --- S VDS = 25V, ID = 82A 20 VDS = 75V, VGS = 0V A 250 VDS = 60V, VGS = 0V, TJ = 150C 200 VGS = 20V nA -200 VGS = -20V 220 ID = 82A 47 nC VDS = 60V 76 VGS = 10V --- VDD = 38V --- ID = 82A ns --- RG = 2.5 --- VGS = 10V D Between lead, --- 6mm (0.25in.) nH G from package --- and center of die contact S --- VGS = 0V --- pF VDS = 25V --- = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 60V, = 1.0MHz --- VGS = 0V, VDS = 0V to 60V
Source-Drain Ratings and Characteristics
Min. Typ. Max. Units IS
ISM
VSD trr Qrr ton Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Starting TJ = 25C, L = 0.130mH RG = 25, IAS = 82A. (See Figure 12). ISD 82A, di/dt 310A/s, VDD V(BR)DSS, TJ 175C Pulse width 400s; duty cycle 2%.
Conditions D MOSFET symbol --- --- 106 showing the A G integral reverse --- --- 550 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 82A, VGS = 0V --- 93 140 ns TJ = 25C, IF = 82A --- 340 510 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Coss eff. is a fixed capacitance that gives the same charging time Calculated continuous current based on maximum allowable Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance. ** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. junction temperature. Package limitation current is 75A. as Coss while VDS is rising from 0 to 80% VDSS .
2
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IRF3808S/LPbF
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
1000
TOP
I D, Drain-to-Source Current (A)
I D, Drain-to-Source Current (A)
BOTTOM
BOTTOM
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
100
100
4.5V
4.5V
10
10
1 0.1 1
20s PULSE WIDTH T J= 25 C
10 100
1 0.1 1
20s PULSE WIDTH T J= 175 C
10 100
V DS Drain-to-Source Voltage (V) ,
V DS Drain-to-Source Voltage (V) ,
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.00
3.0
I D = 137A
ID, Drain-to-Source Current ()
2.5
RDS(on) , Drain-to-Source On Resistance
TJ = 175C
2.0
(Normalized)
100.00
1.5
T J = 25C
1.0
0.5
10.00 1.0 3.0 5.0 7.0
VDS = 15V 20s PULSE WIDTH
9.0 11.0 13.0 15.0
0.0 -60 -40 -20 0 20 40 60 80
V GS = 10V
100 120 140 160 180
TJ , Junction Temperature
( C)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRF3808S/LPbF
100000 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds 10000
VGS , Gate-to-Source Voltage (V)
12
I D = 82A
10
VDS = 60V VDS = 37V VDS = 15V
C, Capacitance(pF)
8
Ciss
6
1000
Coss
4
2
Crss
100 1 10 100
0 0 40 80 120 160
VDS , Drain-to-Source Voltage (V)
QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.00
10000 OPERATION IN THIS AREA LIMITED BY R DS(on)
100.00
T J = 175C
10.00 T J = 25C 1.00 VGS = 0V 0.10 0.0 0.5 1.0 1.5 2.0 VSD, Source-toDrain Voltage (V)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100 100sec 10 Tc = 25C Tj = 175C Single Pulse 1 1 10 100 1000 VDS , Drain-toSource Voltage (V) 1msec 10msec
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF3808S/LPbF
120
LIMITED BY PACKAGE
100
VDS VGS RG
RD
D.U.T.
+
80
I D , Drain Current (A)
-VDD
10V
60
Pulse Width 1 s Duty Factor 0.1 %
40
Fig 10a. Switching Time Test Circuit
VDS 90%
20
0 25 50 75 100 125 150 175
TC , Case Temperature
( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
1
(Z thJC )
D = 0.50
0.20
Thermal Response
0.1
0.10 P DM t1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = 2. Peak T t1/ t 2 +TC 1 10
J = P DM x Z thJC
0.05
0.01 0.00001
0.0001
0.001
0.01
0.1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF3808S/LPbF
15V
800
TOP
RG
20V
D.U.T
IAS tp
+ V - DD
EAS , Single Pulse Avalanche Energy (mJ)
VDS
L
DRIVER
640
BOTTOM
ID 34A 58A 82A
480
A
0.01
320
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
160
0 25 50 75 100 125 150
Starting Tj, Junction Temperature
( C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS
QGD
VGS(th) Gate threshold Voltage (V)
3.5
VG
3.0
Charge
2.5
ID = 250A
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
2.0
50K 12V .2F .3F
1.5
D.U.T. VGS
3mA
+ V - DS
1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200
T J , Temperature ( C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
6
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IRF3808S/LPbF
10000
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
0.01 0.05 0.10
10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
1
0.1 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
500
EAR , Avalanche Energy (mJ)
400
TOP Single Pulse BOTTOM 10% Duty Cycle ID = 140A
300
200
100
0 25 50 75 100 125 150
Starting T J , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = t av *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy Vs. Temperature
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7
IRF3808S/LPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG V GS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ V DD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ISD]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
8
Fig 17. For N-channel HEXFET(R) power MOSFETs
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IRF3808S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 5 3 0 S W IT H L OT CODE 80 2 4 AS S E M B L E D ON W W 0 2, 20 00 IN T H E AS S E M B L Y L IN E "L " N ote: "P " in as s em bly lin e po s itio n in dicates "L ead-F r ee" IN T E R N AT IO N AL R E C T IF IE R L OGO AS S E M B L Y L O T CO D E P AR T N U M B E R F 5 30 S D AT E C O D E Y E AR 0 = 2 0 0 0 W E E K 02 L IN E L
OR
IN T E R N AT IO N AL R E C T IF IE R L O GO AS S E M B L Y L OT COD E P AR T N U M B E R F 530S D AT E CO D E P = D E S IG N AT E S L E AD -F R E E P R O D U C T (O P T IO N AL ) Y E AR 0 = 2 0 0 0 W E E K 02 A = AS S E M B L Y S IT E CO D E
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9
IRF3808S/LPbF
TO-262 Package Outline
IGBT 1- GATE 2- COLLECTOR 3- EMITTER
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS SEMBLED ON WW 19, 1997 IN T HE ASS EMBLY LINE "C" Note: "P" in as s embly line pos ition indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER
DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C
OR
INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = AS S EMBLY S ITE CODE
10
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IRF3808S/LPbF
D2Pak Tape & Reel Infomation
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.6/04
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11


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